Ticket #730: iprop_patch.diff

File iprop_patch.diff, 19.1 KB (added by Casey Biemiller, 9 years ago)

Single file diff of every change

  • Makefile.am

     
    6363        ataprint.h \
    6464        dev_ata_cmd_set.cpp \
    6565        dev_ata_cmd_set.h \
     66        dev_intelliprop.cpp \
     67        dev_intelliprop.h \
    6668        dev_interface.cpp \
    6769        dev_interface.h \
    6870        dev_tunnelled.h \
    … …  
    129131        atacmds.h \
    130132        dev_ata_cmd_set.cpp \
    131133        dev_ata_cmd_set.h \
     134        dev_intelliprop.cpp \
     135        dev_intelliprop.h \
    132136        dev_interface.cpp \
    133137        dev_interface.h \
    134138        dev_tunnelled.h \

  • atacmds.cpp

     
    10971097  return true;
    10981098}
    10991099
     1100// Write GP Log page(s)
     1101bool ataWriteLogExt(ata_device * device, unsigned char logaddr,
     1102                    unsigned page, void * data, unsigned nsectors)
     1103{
     1104  ata_cmd_in in;
     1105  in.in_regs.command      = ATA_WRITE_LOG_EXT;
     1106  in.set_data_out(data, nsectors);
     1107  in.in_regs.lba_low      = logaddr;
     1108  in.in_regs.lba_mid_16   = page;
     1109  in.set_data_out(data, nsectors);
    11001110
     1111  ata_cmd_out out;
     1112  if (!device->ata_pass_through(in, out)) { // TODO: Debug output
     1113    if (nsectors <= 1) {
     1114      pout("ATA_WRITE_LOG_EXT (addr=0x%02x, page=%u, n=%u) failed: %s\n",
     1115           logaddr, page, nsectors, device->get_errmsg());
     1116      return false;
     1117    }
     1118
     1119    // Recurse to retry with single sectors,
     1120    // multi-sector reads may not be supported by ioctl.
     1121    for (unsigned i = 0; i < nsectors; i++) {
     1122      if (!ataWriteLogExt(device, logaddr, page + i,
     1123                         (char *)data + 512*i, 1))
     1124        return false;
     1125    }
     1126  }
     1127
     1128  return true;
     1129}
     1130
    11011131// Read GP Log page(s)
    11021132bool ataReadLogExt(ata_device * device, unsigned char logaddr,
    11031133                   unsigned char features, unsigned page,

  • atacmds.h

     
    9191
    9292// 48-bit commands
    9393#define ATA_READ_LOG_EXT                0x2F
     94#define ATA_WRITE_LOG_EXT               0x3F
    9495
    9596// ATA Specification Feature Register Values (SMART Subcommands).
    9697// Note that some are obsolete as of ATA-7.
    … …  
    781782int ataReadSelectiveSelfTestLog(ata_device * device, struct ata_selective_self_test_log *data);
    782783int ataReadLogDirectory(ata_device * device, ata_smart_log_directory *, bool gpl);
    783784
     785// Write GP Log page(s)
     786bool ataWriteLogExt(ata_device * device, unsigned char logaddr,
     787                    unsigned page, void * data, unsigned nsectors);
     788
    784789// Read GP Log page(s)
    785790bool ataReadLogExt(ata_device * device, unsigned char logaddr,
    786791                   unsigned char features, unsigned page,

  • dev_intelliprop.cpp

     
     1/*
     2 * dev_intelliprop.cpp
     3 *
     4 * Home page of code is: http://www.smartmontools.org
     5 *
     6 * Copyright (C) 2016 Casey Biemiller  <cbiemiller@intelliprop.com>
     7 *
     8 * This program is free software; you can redistribute it and/or modify
     9 * it under the terms of the GNU General Public License as published by
     10 * the Free Software Foundation; either version 2, or (at your option)
     11 * any later version.
     12 *
     13 * You should have received a copy of the GNU General Public License
     14 * (for example COPYING); If not, see <http://www.gnu.org/licenses/>.
     15 *
     16 */
     17
     18#include "config.h"
     19#include "int64.h"
     20#include "atacmds.h" //ATTR_PACKED and ASSERT_SIZEOF_STRUCT
     21#include "dev_interface.h"
     22#include "dev_intelliprop.h"
     23#include "dev_tunnelled.h"
     24#include <errno.h>
     25
     26const char * dev_intelliprop_cpp_cvsid = "$Id: dev_intelliprop.cpp 4209 2016-01-22 20:49:44Z chrfranke $"
     27  DEV_INTELLIPROP_H_CVSID;
     28
     29//Vendor Specific log addresses
     30#define LOG_C0           0xc0
     31
     32// VS LOG MODE CONTROL BITS
     33enum {
     34  IPROP_VS_LOG_MODE_CTL_AUTO_SUPPORTED   = (0 << 0), // NOTE: Not supported
     35  IPROP_VS_LOG_MODE_CTL_MANUAL_SUPPORTED = (1 << 1),
     36  IPROP_VS_LOG_MODE_CTL_AUTO_ENABLED     = (0 << 2), // NOTE: Not supported
     37  IPROP_VS_LOG_MODE_CTL_MANUAL_ENABLED   = (1 << 3),
     38};
     39
     40// VS LOG PORT SETTING BITS
     41enum {
     42  IPROP_VS_LOG_PORT_WRITE_ENABLE_MASK  = 0xC000,
     43  IPROP_VS_LOG_PORT_WRITE_ENABLE_VALID = 0x8000,
     44  IPROP_VS_LOG_PORT_RX_DC_GAIN_MASK    = 0x3000,
     45  IPROP_VS_LOG_PORT_RX_DC_GAIN_SHIFT   = 12,
     46  IPROP_VS_LOG_PORT_RX_EQ_MASK         = 0x0F00,
     47  IPROP_VS_LOG_PORT_RX_EQ_SHIFT        = 8,
     48  IPROP_VS_LOG_PORT_TX_PREEMP_MASK     = 0x00F8,
     49  IPROP_VS_LOG_PORT_TX_PREEMP_SHIFT    = 3,
     50  IPROP_VS_LOG_PORT_TX_VOD_MASK        = 0x0007,
     51  IPROP_VS_LOG_PORT_TX_VOD_SHIFT       = 0,
     52};
     53
     54//This struct is used for the Vendor Specific log C0 on devices that support it.
     55#pragma pack(1)
     56struct iprop_internal_log
     57{
     58  uint32_t drive_select;       // Bytes - [  3:  0] of Log C0
     59  uint32_t obsolete;           // Bytes - [  7:  4] of Log C0
     60  uint8_t  mode_control;       // Byte  - [      8] of Log C0
     61  uint8_t  log_passthrough;    // Byte  - [      9] of Log C0
     62  uint16_t tier_id;            // Bytes - [ 11: 10] of Log C0
     63  uint32_t hw_version;         // Bytes - [ 15: 12] of Log C0
     64  uint32_t fw_version;         // Bytes - [ 19: 16] of Log C0
     65  uint8_t  variant[8];         // Bytes - [ 27: 20] of Log C0
     66  uint8_t  reserved[228];      // Bytes - [255: 28] of Log C0
     67  uint16_t port_0_settings[3]; // Bytes - [263:256] of Log C0
     68  uint16_t port_0_reserved;
     69  uint16_t port_1_settings[3]; // Bytes - [271:264] of Log C0
     70  uint16_t port_1_reserved;
     71  uint16_t port_2_settings[3]; // Bytes - [279:272] of Log C0
     72  uint16_t port_2_reserved;
     73  uint16_t port_3_settings[3]; // Bytes - [287:280] of Log C0
     74  uint16_t port_3_reserved;
     75  uint16_t port_4_settings[3]; // Bytes - [295:288] of Log C0
     76  uint16_t port_4_reserved;
     77  uint8_t  reserved2[214];     // Bytes - [509:296] of Log C0
     78  uint16_t crc;                // Bytes - [511:510] of Log C0
     79} ATTR_PACKED;
     80#pragma pack()
     81ASSERT_SIZEOF_STRUCT(iprop_internal_log, 512);
     82
     83/**
     84 * buffer is a pointer to a buffer of bytes, which should include data and
     85 *   also CRC if the function is being used to check CRC
     86 * len is the number of bytes in the buffer (including CRC if it is present)
     87 * check_crc is a boolean value, set true to check an existing CRC, false
     88 *   to calculate a new CRC
     89 */
     90static uint16_t iprop_crc16_1(uint8_t * buffer, uint32_t len, bool check_crc)
     91{
     92  uint8_t crc[16];
     93  uint16_t crc_final = 0;
     94  uint8_t crc_msb;
     95  uint8_t data_msb;
     96  uint32_t total_len;
     97
     98  // Initialize CRC array
     99  for (uint32_t ii = 0; ii < 16; ii++) {
     100    crc[ii] = 0;
     101    //crc[ii] = (crc_in >> ii) & 1;
     102  }
     103
     104  // If calculating a new CRC, we need to pad the data with extra zeroes
     105  total_len = check_crc ? len : len + 2;
     106
     107  // Loop for each byte, plus extra for the CRC itself
     108  for (uint32_t ii = 0; ii < total_len; ii++) {
     109    uint8_t data = (ii < len) ? buffer[ii] : 0;
     110
     111    // Loop for each bit
     112    for (uint32_t jj = 0; jj < 8; jj++) {
     113      crc_msb = crc[15];
     114      data_msb = (data >> (8 - jj - 1)) & 1;
     115
     116      crc[15] = crc[14] ^ crc_msb;
     117      crc[14] = crc[13];
     118      crc[13] = crc[12];
     119      crc[12] = crc[11];
     120      crc[11] = crc[10] ^ crc_msb;
     121      crc[10] = crc[9];
     122      crc[9] = crc[8] ^ crc_msb;
     123      crc[8] = crc[7] ^ crc_msb;
     124      crc[7] = crc[6] ^ crc_msb;
     125      crc[6] = crc[5];
     126      crc[5] = crc[4] ^ crc_msb;
     127      crc[4] = crc[3] ^ crc_msb;
     128      crc[3] = crc[2];
     129      crc[2] = crc[1] ^ crc_msb;
     130      crc[1] = crc[0] ^ crc_msb;
     131      crc[0] = data_msb ^ crc_msb;
     132    }
     133  }
     134
     135  // Convert CRC array to final value
     136  for (uint32_t ii = 0; ii < 16; ii++) {
     137    if (crc[ii] == 1) {
     138      crc_final |= (1 << ii);
     139    } else {
     140      crc_final &= ~(1 << ii);
     141    }
     142  }
     143
     144  return crc_final;
     145}
     146
     147static void iprop_dump_log_structure(struct iprop_internal_log const * const log)
     148{
     149  pout("Dumping LOG Structure:\n");
     150  pout("  drive_select:           0x%08x\n", log->drive_select);
     151  pout("  obsolete:               0x%08x\n", log->obsolete);
     152  pout("  mode_control:           0x%02x\n", log->mode_control);
     153  pout("  log_passthrough:        0x%02x\n", log->log_passthrough);
     154  pout("  tier_id:                0x%04x\n", log->tier_id);
     155  pout("  hw_version:             0x%08x\n", log->hw_version);
     156  pout("  fw_version:             0x%08x\n", log->fw_version);
     157  pout("  variant:                \"");
     158  for (int ii = 0; ii < 8; ii++) {
     159    pout("%c", (char)log->variant[ii]);
     160  }
     161  pout("\"\n");
     162  pout("  port_0_settings(Gen 1): 0x%08x\n", log->port_0_settings[0]);
     163  pout("  port_0_settings(Gen 2): 0x%08x\n", log->port_0_settings[1]);
     164  pout("  port_0_settings(Gen 3): 0x%08x\n", log->port_0_settings[2]);
     165  pout("  port_1_settings(Gen 1): 0x%08x\n", log->port_1_settings[0]);
     166  pout("  port_1_settings(Gen 2): 0x%08x\n", log->port_1_settings[1]);
     167  pout("  port_1_settings(Gen 3): 0x%08x\n", log->port_1_settings[2]);
     168  pout("  port_2_settings(Gen 1): 0x%08x\n", log->port_2_settings[0]);
     169  pout("  port_2_settings(Gen 2): 0x%08x\n", log->port_2_settings[1]);
     170  pout("  port_2_settings(Gen 3): 0x%08x\n", log->port_2_settings[2]);
     171  pout("  port_3_settings(Gen 1): 0x%08x\n", log->port_3_settings[0]);
     172  pout("  port_3_settings(Gen 2): 0x%08x\n", log->port_3_settings[1]);
     173  pout("  port_3_settings(Gen 3): 0x%08x\n", log->port_3_settings[2]);
     174  pout("  port_4_settings(Gen 1): 0x%08x\n", log->port_4_settings[0]);
     175  pout("  port_4_settings(Gen 2): 0x%08x\n", log->port_4_settings[1]);
     176  pout("  port_4_settings(Gen 3): 0x%08x\n", log->port_4_settings[2]);
     177  pout("  crc:                    0x%04x\n", log->crc);
     178  pout("\n");
     179}
     180
     181static bool iprop_switch_routed_drive(ata_device * device, int drive_select)
     182{
     183  // Declare a log page buffer and initialize it with what is on the drive currently
     184  iprop_internal_log write_payload;
     185  if (!ataReadLogExt(device, LOG_C0, 0, 0, &write_payload, 1))
     186    return device->set_err(EIO, "intelliprop: Initial Read Log failed: %s", device->get_errmsg());
     187
     188  // Check the returned data is good
     189  uint16_t const crc_check = iprop_crc16_1((uint8_t *)&write_payload,
     190                                           sizeof(struct iprop_internal_log),
     191                                           false);
     192
     193
     194   //If this first read fails the crc check, the log can be still sent with routing information
     195   //as long as everything else in the log is zeroed. So there is no need to return false.
     196  if (crc_check != 0) {
     197    if (ata_debugmode)
     198      pout("Intelliprop WARNING: Received log crc(0x%04X) is invalid!\n", crc_check);
     199    iprop_dump_log_structure(&write_payload);
     200    memset(&write_payload, 0, sizeof(struct iprop_internal_log));
     201  }
     202
     203  //The option to read the log, even if successful, could be useful
     204  if (ata_debugmode)
     205    iprop_dump_log_structure(&write_payload);
     206
     207  // Modify the current drive select to what we were given
     208  write_payload.drive_select = (uint32_t)drive_select;
     209  if (ata_debugmode)
     210    pout("Intelliprop - Change to port 0x%08X.\n", write_payload.drive_select);
     211  write_payload.log_passthrough = 0; // TEST (Set to 1, non hydra member drive will abort --> test error handling)
     212  write_payload.tier_id = 0; // TEST (Set to non-zero, non hydra member drive will abort --> test error handling)
     213
     214  // Update the CRC area
     215  uint16_t const crc_new = iprop_crc16_1((uint8_t *)&write_payload,
     216                                         sizeof(struct iprop_internal_log) - sizeof(uint16_t),
     217                                         false);
     218  write_payload.crc = (crc_new >> 8) | (crc_new << 8);
     219
     220  // Check our CRC work
     221  uint16_t const crc_check2 = iprop_crc16_1((uint8_t *)&write_payload,
     222                                            sizeof(struct iprop_internal_log),
     223                                            false);
     224  if (crc_check2 != 0)
     225    return device->set_err(EIO, "intelliprop: Re-calculated log crc(0x%04X) is invalid!", crc_check2);
     226
     227  // Apply the Write LOG
     228  if (!ataWriteLogExt(device, LOG_C0, 0, &write_payload, 1))
     229    return device->set_err(EIO, "intelliprop: Write Log failed: %s", device->get_errmsg());
     230
     231  // Check that the Write LOG was applied
     232  iprop_internal_log check_payload;
     233  if (!ataReadLogExt(device, LOG_C0, 0, 0, &check_payload, 1))
     234    return device->set_err(EIO, "intelliprop: Secondary Read Log failed: %s", device->get_errmsg());
     235
     236  if (check_payload.drive_select != write_payload.drive_select) {
     237    if (ata_debugmode > 1)
     238      iprop_dump_log_structure(&check_payload);
     239    return device->set_err(EIO, "intelliprop: Current drive select val(0x%08X) is not expected(0x%08X)",
     240         check_payload.drive_select,
     241         write_payload.drive_select);
     242  }
     243
     244  return true;
     245}
     246
     247namespace intelliprop {
     248
     249class intelliprop_device
     250: public tunnelled_device<
     251    /*implements*/ ata_device,
     252    /*by using an*/ ata_device
     253  >
     254{
     255public:
     256  intelliprop_device(smart_interface * intf, unsigned phydrive, ata_device * atadev);
     257
     258  virtual ~intelliprop_device() throw();
     259
     260  virtual bool open();
     261
     262  virtual bool ata_pass_through(const ata_cmd_in & in, ata_cmd_out & out);
     263
     264private:
     265  unsigned m_phydrive;
     266};
     267
     268
     269intelliprop_device::intelliprop_device(smart_interface * intf, unsigned phydrive, ata_device * atadev)
     270: smart_device(intf, atadev->get_dev_name(), "intelliprop", "intelliprop"),
     271  tunnelled_device<ata_device, ata_device>(atadev),
     272  m_phydrive(phydrive)
     273{
     274  set_info().info_name = strprintf("%s [intelliprop_disk_%u]", atadev->get_info_name(), phydrive);
     275}
     276
     277intelliprop_device::~intelliprop_device() throw()
     278{
     279}
     280
     281bool intelliprop_device::open()
     282{
     283  if (!tunnelled_device<ata_device, ata_device>::open())
     284    return false;
     285
     286  ata_device * atadev = get_tunnel_dev();
     287  if (!iprop_switch_routed_drive(atadev, m_phydrive)) {
     288    close();
     289    return set_err(atadev->get_err());
     290  }
     291
     292  return true;
     293}
     294
     295bool intelliprop_device::ata_pass_through(const ata_cmd_in & in, ata_cmd_out & out)
     296{
     297  return get_tunnel_dev()->ata_pass_through(in, out);
     298}
     299}//namespace
     300
     301ata_device * get_intelliprop_device(smart_interface * intf, unsigned phydrive, ata_device * atadev)
     302{
     303  return new intelliprop::intelliprop_device(intf, phydrive, atadev);
     304}

  • dev_intelliprop.h

     
     1/*
     2 * dev_intelliprop.h
     3 *
     4 * Home page of code is: http://www.smartmontools.org
     5 *
     6 * Copyright (C) 2012 Hank Wu <hank@areca.com.tw>
     7 *
     8 * This program is free software; you can redistribute it and/or modify
     9 * it under the terms of the GNU General Public License as published by
     10 * the Free Software Foundation; either version 2, or (at your option)
     11 * any later version.
     12 *
     13 * You should have received a copy of the GNU General Public License
     14 * (for example COPYING); If not, see <http://www.gnu.org/licenses/>.
     15 *
     16 */
     17
     18#ifndef DEV_INTELLIPROP_H
     19#define DEV_INTELLIPROP_H
     20
     21#define DEV_INTELLIPROP_H_CVSID "$Id: dev_intelliprop.h 4146 2015-10-17 12:12:49Z chrfranke $"
     22
     23ata_device * get_intelliprop_device(smart_interface * intf, unsigned phydrive, ata_device * atadev);
     24
     25#endif

  • dev_interface.cpp

     
    1818#include "config.h"
    1919#include "int64.h"
    2020#include "dev_interface.h"
     21#include "dev_intelliprop.h"
    2122#include "dev_tunnelled.h"
    2223#include "atacmds.h" // ATA_SMART_CMD/STATUS
    2324#include "utility.h"
    … …  
    281282{
    282283  // default
    283284  std::string s =
    284     "ata, scsi, nvme[,NSID], sat[,auto][,N][+TYPE], "
    285     "usbcypress[,X], usbjmicron[,p][,x][,N], usbprolific, usbsunplus";
     285    "ata, scsi, nvme[,NSID], sat[,auto][,N][+TYPE], usbcypress[,X], "
     286    "usbjmicron[,p][,x][,N], usbprolific, usbsunplus, intelliprop,N[+TYPE]";
    286287  // append custom
    287288  std::string s2 = get_valid_custom_dev_types_str();
    288289  if (!s2.empty()) {
    … …  
    422423    return get_sat_device(sattype.c_str(), basedev.release()->to_scsi());
    423424  }
    424425
     426  else if (str_starts_with(type, "intelliprop")) {
     427    // Parse "intelliprop,N[+base...]"
     428    unsigned phydrive = ~0; int n = -1; char c = 0;
     429    sscanf(type, "intelliprop,%u%n%c", &phydrive, &n, &c);
     430    if (!((n == (int)strlen(type) || c == '+') && phydrive <= 3)) {
     431      set_err(EINVAL, "Option '-d intelliprop,N' requires N between 0 and 3");
     432      return 0;
     433    }
     434    const char * basetype = (type[n] ? type + n + 1 : "");
     435    // Recurse to allocate base device, default is standard ATA
     436    if (!*basetype)
     437      basetype = "ata";
     438    smart_device_auto_ptr basedev( get_smart_device(name, basetype) );
     439    if (!basedev) {
     440      set_err(EINVAL, "Type '%s': %s", type, get_errmsg());
     441      return 0;
     442    }
     443    // Result must be ATA
     444    if (!basedev->is_ata()) {
     445      set_err(EINVAL, "Type '%s': Device type '%s' is not ATA", type, basetype);
     446      return 0;
     447    }
     448    return get_intelliprop_device(this, phydrive, basedev.release()->to_ata());
     449  }
     450
    425451  else {
    426452    set_err(EINVAL, "Unknown device type '%s'", type);
    427453    return 0;

  • smartctl.8.in

     
    646646under FreeBSD, it is the character device which the driver registered (eg,
    647647/dev/hptrr, /dev/hptmv6).
    648648.\" %ENDIF OS FreeBSD Linux
     649.\" %IF OS Linux
     650
     651.I intelliprop,N[+TYPE]
     652\- [NEW EXPERIMENTAL SMARTCTL FEATURE] the device consists of multiple ATA
     653disks connected to an Intelliprop controller. The integer N is the port number
     654from 0 to 3 of the ATA drive to be targeted. The TYPE can be ata(default),
     655sat, or a USB controller listed above. Note: if a type of ATA does not
     656work, try a type of sat.
     657Use syntax such as:
     658.nf
     659\fBsmartctl \-a \-d intelliprop,1 /dev/sda\fP    (under Linux)
     660.fi
     661.nf
     662\fBsmartctl \-a \-d intelliprop,1+sat /dev/sda\fP    (under Linux)
     663.fi
     664.\" %ENDIF OS Linux
     665
    649666.TP
    650667.B \-T TYPE, \-\-tolerance=TYPE
    651668[ATA only] Specifies how tolerant \fBsmartctl\fP should be of ATA and SMART

  • smartd.conf.5.in

     
    187187.B \ \ /dev/hptrr -d hpt,1/4/2 -a -s L/../../7/02
    188188.B #
    189189.\" %ENDIF OS FreeBSD
     190.B # Two SATA disks on an Intelliprop controller.
     191.B # Start short self-tests daily between 1-2, 2-3, and
     192.B # 3-4 am.
     193.\" %IF OS Linux
     194.B # under Linux
     195.B \ \ /dev/sde -d intelliprop,0+sat -a -s S/../.././01
     196.B \ \ /dev/sde -d intelliprop,1+sat -a -s S/../.././02
     197.\" %ENDIF OS Linux
     198.B # Four SATA disks on an Intelliprop controller.
     199.B # Start long self-tests daily between 1-2, 2-3,
     200.B # 3-4, and 4-5 am.
     201.\" %IF OS Linux
     202.B # under Linux
     203.B \ \ /dev/sde -d intelliprop,0+sat -a -s L/../.././01
     204.B \ \ /dev/sde -d intelliprop,1+sat -a -s L/../.././02
     205.B \ \ /dev/sde -d intelliprop,2+sat -a -s L/../.././03
     206.B \ \ /dev/sde -d intelliprop,3+sat -a -s L/../.././04
     207.\" %ENDIF OS Linux
    190208.B # Three SATA disks connected to an Areca
    191209.B # RAID controller. Start long self-tests Sundays
    192210.B # between midnight and 3 am.